tm may 2009 ?2009 fairchild semiconductor corporation FDMS5352 rev.c 1 www.fairchildsemi.com 1 FDMS5352 n-channel power trench ? mosfet FDMS5352 n-channel power trench ? mosfet 60v, 49a, 6.7m : features ? max r ds(on) = 6.7m : at v gs = 10v, i d = 13.6a ? max r ds(on) = 8.2m : at v gs = 4.5v, i d = 12.3a ? advanced package and silicon combination for low r ds(on) ? msl1 robust package design ? 100% uil tested ? rohs compliant general description this n-channel mosfet is produced using fairchild semiconductor?s advanced power trench ? process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. application ? dc - dc conversion mosfet maximum ratings t a = 25c unless otherwise noted thermal characteristics package marking an d ordering information symbol parameter ratings units v ds drain to source voltage 60 v v gs gate to source voltage 20 v i d drain current -continuous (package limited) t c = 25c 49 a -continuous (silicon limited) t c = 25c 88 -continuous t a = 25c (note 1a) 13.6 -pulsed 100 e as single pulse avalanche energy (note 3) 600 mj p d power dissipation t c = 25c 104 w power dissipation t a = 25c (note 1a) 2.5 t j , t stg operating and storage junction temperature range -55 to +150 c r t jc thermal resistance, junction to case 1.2 c/w r t ja thermal resistance, junction to ambient (note 1a) 50 device marking device package reel size tape width quantity FDMS5352 FDMS5352 power 56 13?? 12mm 3000 units g s s s d d d d 5 6 7 8 3 2 1 4 bottom power 56 top pin 1 g s s s d d d d
FDMS5352 n-channel power trench ? mosfet www.fairchildsemi.com 2 ?2 009 fairchild semiconductor corporation FDMS5352 rev.c 1 electrical characteristics t j = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain to source breakdown voltage i d = 250 p a, v gs = 0v 60 v ' bv dss ' t j breakdown voltage temperature coefficient i d = 250 p a, referenced to 25c 57 mv/c i dss zero gate voltage drain current v gs = 0v, v ds = 48v, 1 p a i gss gate to source leakage current v gs = 20v, v ds = 0v 100 na on characteristics v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 p a 1.0 1.8 3.0 v ' v gs(th) ' t j gate to source threshold voltage temperature coefficient i d = 250 p a, referenced to 25c -6.6 mv/c r ds(on) static drain to source on resistance v gs = 10v, i d = 13.6a 5.6 6.7 m : v gs = 4.5v, i d = 12.3a 6.7 8.2 v gs = 10v, i d = 13.6a, t j = 125c 9.7 11.6 g fs forward transconductance v dd = 5v, i d = 13.6a 76 s dynamic characteristics c iss input capacitance v ds = 30v, v gs = 0v, f = 1mhz 5220 6940 pf c oss output capacitance 410 545 pf c rss reverse transfer capacitance 225 335 pf r g gate resistance f = 1mhz 1.3 : switching characteristics t d(on) turn-on delay time v dd = 30v, i d = 13.6a, v gs = 10v, r gen = 6 : 19 34 ns t r rise time 11 21 ns t d(off) turn-off delay time 58 93 ns t f fall time 715ns q g total gate charge v gs = 0 v t o 1 0 v v dd = 30v, i d = 13.6a 93 131 nc q g total gate charge v gs = 0v to 5v 48 67 nc q gs gate to source charge 14 nc q gd gate to drain ?miller? charge 17 nc drain-source diode characteristics v sd source to drain diode forward voltage v gs = 0v, i s = 13.6a (note 2) 0.8 1.3 v v gs = 0v, i s = 2.1a (note 2) 0.7 1.2 t rr reverse recovery time i f = 13.6a, di/dt = 100a/ p s 39 63 ns q rr reverse recovery charge 48 77 nc notes: 1. r t ja is determined with the device mounted on a 1in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r t jc is guaranteed by design while r t ca is determined by the user's board design. 2. pulse test: pulse width < 30 0 p s, duty cycle < 2.0%. 3. starting t j = 25 c, l = 3mh, i as = 20a, v dd = 60v, v gs = 10v a. 50c/w when mounted on a 1 in 2 pad of 2 oz copper. b. 125c/w when mounted on a minimum pad of 2 oz copper.
FDMS5352 n-channel power trench ? mosfet www.fairchildsemi.com 3 ?2 009 fairchild semiconductor corporation FDMS5352 rev.c 1 typical characteristics t j = 25c unless otherwise noted figure 1. 0.00.51.01.52.0 0 20 40 60 80 100 v gs = 4.5v v gs = 3.5v pulse duration = 80 p s duty cycle = 0.5%max v gs = 4v v gs = 3v v gs = 10v i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 020406080100 0.5 1.0 1.5 2.0 2.5 3.0 v gs =10v pulse duration = 80 p s duty cycle = 0.5%max normalized drain to source on-resistance i d , drain current(a) v gs = 4v v gs = 3.5v v gs = 3v v gs =4.5v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 i d = 13.6a v gs = 10v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 246810 0 5 10 15 20 i d = 13.6a t j = 25 o c t j = 125 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5%max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 20 40 60 80 100 v ds = 5v pulse duration = 80 p s duty cycle = 0.5%max t j = -55 o c t j = 25 o c t j = 150 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDMS5352 n-channel power trench ? mosfet www.fairchildsemi.com 4 ?2 009 fairchild semiconductor corporation FDMS5352 rev.c 1 figure 7. 0 20406080100 0 2 4 6 8 10 i d = 13.6a v dd = 40v v dd = 20v v gs , gate to source voltage(v) q g , gate charge(nc) v dd = 30v gate charge characteristics figure 8. 0.1 1 10 100 100 1000 10000 f = 1mhz v gs = 0v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.1 1 10 100 1 10 500 t j = 25 o c t j = 125 o c t av , time in avalanche(ms) i as , avalanche current(a) 20 u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 15 30 45 60 75 90 v gs = 4.5v r t jc = 1.2 o c/w v gs = 10v i d , drain current (a) t c , case temperature ( o c ) limited by package m a x i m u m c o n t i n u o u s d r a i n current vs case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 200 dc 10s 1s 100ms 10ms 1ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t a = 25 o c 300 figure 12. 10 -3 10 -2 10 -1 110 100 1000 1 10 100 1000 single pulse r t ja = 125 o c/w t a = 25 o c 0.5 v gs = 10v p ( pk ) , peak transient power (w) t, pulse width (sec) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25c unless otherwise noted
FDMS5352 n-channel power trench ? mosfet www.fairchildsemi.com 5 ?2 009 fairchild semiconductor corporation FDMS5352 rev.c 1 figure 13. transient thermal response curve 10 -3 10 -2 10 -1 110 100 1000 0.001 0.01 0.1 1 single pulse r t ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25c unless otherwise noted
FDMS5352 n-channel power trench ? mosfet www.fairchildsemi.com 6 ?2009 fairchild semiconductor corporation FDMS5352 rev.c 1 dimensional outline and pad layout
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